• Article  

      Automatic Generation of Peak-Power Traffic for Networks-on-Chip 

      Seitanidis, Ioannis; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos (2019)
      Early estimation of the peak power consumption of a system under development is crucial in assessing the design's thermal profile and reliability, and in benchmarking the chip-level power management features. In this paper, ...
    • Conference Object  

      Dynamic Adjustment of Test-Sequence Duration for Increasing the Functional Coverage 

      Takakis, Zacharias; Mangiras, Dimitrios; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos (2019)
      The importance of functional coverage during front-end verification is steadily increasing. Complete coverage statistics, possibly spanning from block- to top-level, are required as a proof of verification quality and ...
    • Conference Object  

      Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core 

      Gabor, Ron; Sazeides, Yiannakis; Bramnik, Arkady; Andreou, Alexandros; Nicopoulos, Chrysostomos; Patsidis, Karyofyllis; Konstantinou, Dimitris; Dimitrakopoulos, Giorgos (2019)
      Emerging mission-critical and functional safety applications require high-performance processors that meet strict reliability requirements against random hardware failures. These requirements touch even sub-systems within ...
    • Conference Object  

      Error-Shielded Register Renaming Sub-system for a Dynamically Scheduled Out-of-Order Core 

      Gabor, Ron; Sazeides, Yiannakis; Bramnik, Arkady; Andreou, Alexandros; Nicopoulos, Chrysostomos; Patsidis, Karyofyllis; Konstantinou, Dimitris; Dimitrakopoulos, Giorgos (2019)
      Emerging mission-critical and functional safety applications require high-performance processors that meet strict reliability requirements against random hardware failures. These requirements touch even sub-systems within ...
    • Book Chapter  

      Evaluating System-Level Monitors and Knobs on Real Hardware 

      Nikolaou, Panagiota; Hadjilambrou, Zacharias; Englezakis, Panayiotis; Ndreu, Lorena; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Portero, Antoni; Vavrik, Radim; Vondrak, Vit (Springer International Publishing, 2019)
      This chapter evaluates and defines a methodology for the oracle selection of the monitors and knobs to use to configure an HPC system running a scientific application while satisfying the application’s requirements and not ...
    • Book Chapter  

      Evaluating System-Level Monitors and Knobs on Real Hardware 

      Nikolaou, Panagiota; Hadjilambrou, Zacharias; Englezakis, Panayiotis; Ndreu, Lorena; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Portero, Antoni; Vavrik, Radim; Vondrak, Vit (Springer International Publishing, 2019)
      This chapter evaluates and defines a methodology for the oracle selection of the monitors and knobs to use to configure an HPC system running a scientific application while satisfying the application’s requirements and not ...
    • Conference Object  

      Fast Estimations of Failure Probability Over Long Time Spans 

      Noltsis, Michail; Englezakis, Panayiotis; Maragkoudaki, Eleni; Nicopoulos, Chrysostomos; Rodopoulos, Dimitrios; Catthoor, Francky; Sazeides, Yiannakis; Zoni, Davide; Soudris, Dimitrios (Association for Computing Machinery, 2018)
      Shrinking of device dimensions has undoubtedly enabled the very large scale integration of transistors on electronic chips. However, it has also brought to surface time-zero and time-dependent variation phenomena that ...
    • Conference Object  

      Fast Estimations of Failure Probability Over Long Time Spans 

      Noltsis, Michail; Englezakis, Panayiotis; Maragkoudaki, Eleni; Nicopoulos, Chrysostomos; Rodopoulos, Dimitrios; Catthoor, Francky; Sazeides, Yiannakis; Zoni, Davide; Soudris, Dimitrios (Association for Computing Machinery, 2018)
      Shrinking of device dimensions has undoubtedly enabled the very large scale integration of transistors on electronic chips. However, it has also brought to surface time-zero and time-dependent variation phenomena that ...
    • Conference Object  

      Hardware-Based Online Self-Diagnosis for Faulty Device Identification in Large-Scale IoT Systems 

      Lee, Junghee; Debnath, Monobrata; Patki, Amit; Hasan, Mostafa; Nicopoulos, Chrysostomos (2018)
      Thanks to advances in semiconductor and communication technologies, a multitude of devices can be connected over a network. This widespread interconnectivity among disparate devices has ushered the era of Internet-of-Things ...
    • Book Chapter  

      The HARPA Approach to Ensure Dependable Performance 

      Zompakis, Nikolaos; Noltsis, Michail; Nikolaou, Panagiota; Englezakis, Panayiotis; Hadjilambrou, Zacharias; Ndreu, Lorena; Massari, Giuseppe; Libutti, Simone; Portero, Antoni; Sassi, Federico; Bacchini, Alessandro; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Vavrik, Radim; Golasowski, Martin; Sevcik, Jiri; Kuchar, Stepan; Vondrak, Vit; Agnes, Fritsch; Cappelle, Hans; Catthoor, Francky; Fornaciari, William; Soudris, Dimitrios (Springer International Publishing, 2019)
      The goal of the HARPA solution is to overcome the performance variability (PV) by enabling next-generation embedded and high-performance platforms using heterogeneous many-core processors to provide cost-effectively ...
    • Book Chapter  

      The HARPA Approach to Ensure Dependable Performance 

      Zompakis, Nikolaos; Noltsis, Michail; Nikolaou, Panagiota; Englezakis, Panayiotis; Hadjilambrou, Zacharias; Ndreu, Lorena; Massari, Giuseppe; Libutti, Simone; Portero, Antoni; Sassi, Federico; Bacchini, Alessandro; Nicopoulos, Chrysostomos; Sazeides, Yiannakis; Vavrik, Radim; Golasowski, Martin; Sevcik, Jiri; Kuchar, Stepan; Vondrak, Vit; Agnes, Fritsch; Cappelle, Hans; Catthoor, Francky; Fornaciari, William; Soudris, Dimitrios (Springer International Publishing, 2019)
      The goal of the HARPA solution is to overcome the performance variability (PV) by enabling next-generation embedded and high-performance platforms using heterogeneous many-core processors to provide cost-effectively ...
    • Article  

      A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension 

      Patsidis, Karyofyllis; Konstantinou, Dimitris; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos (2018)
      The RISC-V Instruction Set Architecture (ISA) is becoming an increasingly popular ecosystem for both hardware and software development. In this article, we investigate one of RISC-V’s most versatile ISA extensions, which ...
    • Conference Object  

      Low-power dual-edge-triggered synchronous latency-insensitive systems 

      Konstantinou, Dimitris; Psarras, Anastasios; Dimitrakopoulos, Giorgos; Nicopoulos, Chrysostomos (2018)
      Latency-insensitive data flow is a design paradigm that tolerates the latency variability of computations and communications and allows for correct-by-construction module integration. In this paper, we aim to reduce the ...
    • Article  

      The Mesochronous Dual-Clock FIFO Buffer 

      Konstantinou, Dimitrios; Psarras, Anastasios; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos (2020)
      To increase system composability and facilitate timing closure, fully synchronous clocking is replaced by more relaxed clocking schemes, such as mesochronous clocking. Under this regime, the modules at the two ends of a ...
    • Book Chapter  

      Monitor and Knob Techniques in Network-on-Chip Architectures 

      Zoni, Davide; Englezakis, Panayiotis; Chrysanthou, Kypros; Canidio, Andrea; Prodromou, Andreas; Panteli, Andreas; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos; Sazeides, Yiannakis; Fornaciari, William (Springer International Publishing, 2019)
      This chapter proposes and analyzes two autonomous, hardware-based monitor/knob solutions for Network-on-Chip (NoC) architectures, which operate at the micro-architectural level. The two proposed techniques tackle power and ...
    • Book Chapter  

      Monitor and Knob Techniques in Network-on-Chip Architectures 

      Zoni, Davide; Englezakis, Panayiotis; Chrysanthou, Kypros; Canidio, Andrea; Prodromou, Andreas; Panteli, Andreas; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos; Sazeides, Yiannakis; Fornaciari, William (Springer International Publishing, 2019)
      This chapter proposes and analyzes two autonomous, hardware-based monitor/knob solutions for Network-on-Chip (NoC) architectures, which operate at the micro-architectural level. The two proposed techniques tackle power and ...
    • Conference Object  

      Multi-Armed Bandits for Autonomous Timing-driven Design Optimization 

      Stefanidis, Apostolos; Mangiras, Dimitrios; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos (2019)
      Timing closure is a complex process that involves many iterative optimization steps applied in various phases of the physical design flow. Cell sizing and transistor threshold selection, as well as datapath and clock ...
    • Book Chapter  

      Self-testing of multicore processors 

      Skitsas, Michael A.; Restifo, Marco; Michael, Maria K.; Nicopoulos, Chrysostomos; Bernardi, Paolo; Sanchez, Ernesto (IET Digital Library, 2019)
      The purpose of this chapter is to develop a review of state-of-the-art techniques and methodologies for the self-testing of multicore processors. The chapter is divided into two main sections: (a) self-testing solutions ...
    • Article  

      Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering 

      Mangiras, Dimitrios; Stefanidis, Apostolos; Seitanidis, Ioannis; Nicopoulos, Chrysostomos; Dimitrakopoulos, Giorgos (2019)
      Timing-driven placement optimization is applied incrementally in various parts of the flow, together with other timing optimization techniques, to achieve timing closure. In this work, we present a generalized approach for ...